One-week AICTE QIP STTP on "VLSI Design: Basic to Advanced" during March 13-17, 2018

One-week AICTE QIP STTP on "VLSI Design: Basic to Advanced" during March 13-17, 2018

Coordinators: Dr. Suhas S. Gajre, Dr. Ramchandra R. Manthalkar 
 
Department of Electronics & Telecommunication Engineering
Shri Guru Gobind Singhji Institute of Engineering and Technology, Vishnupuri, Nanded (M.S.) PIN 431606 INDIA 
 
 
 
 
Introduction

The contribution of VLSI in shaping the last 7-8 decades of inventions requires no introduction.  The VLSI chip design is one of the fastest growing field even now. The advances have resulted in highly reliable and fast electronics systems in miniaturised scale. There is an urgent need to produce high quality engineers who are having sufficient skills to work in the VLSI industry. They should be able to design new VLSI chips and also embedded systems, IoT, etc. Our STTP is designed for awareness and basic learning plus hands-on to meet this objective.  This will be an intensive training programme!  

About STTP

The foundation will be built through lectures on Microelectronics, where basics will be revised. The devices and circuits will be re-introduced with current perspectives of nanometer era.  Then the topics on Digital VLSI Design, Analog and Mixed Signal Design, Embedded System Design, Low-power VLSI Design, Verification, etc., will be taken. One of the most important and salient feature of the STTP is focus on practical skills.  Faculty experts from the department, external resource persons, and leading Industry experts will deliver the quality sessions.

Who can join and how

Thirty faculty members from AICTE recognised degree level engineering colleges and polytechnics will get a chance to attend STTP free of cost with a caution money deposit of ₹ 1000/- in the form of Demand Draft (which will be refunded after successful completion of STTP, but will be forfeited if participant does not turn up, or does not complete the STTP). The faculty who will pay CMD amount in the form of Demand Draft on Nationalised Bank in favour of “Director, SGGSIE&T, Vishnupuri, Nanded” will be given chance on first-cum-first-served basis. Participants are entitled for bus/sleeper class/3A railway to and fro fare by the shortest route (Participant’s Institute to Nanded and back). Local participants can avail free bus transportation of Institute. Limited outstation participants will be provided lodging and boarding in the institute hostel on request with minimal cost (since accommodation is limited, family members of participants cannot be accommodated). Candidate should complete the enclosed registration form and send by speed post or courier to the coordinator along with the DD. Confirmation of eligible candidates will be on first come first serve basis up to a maximum of 30 candidates. The completed registration forms along with the Demand Draft should be received by the coordinator on or before 10th March 2018.  For all other interested faculty members (not selected in first 30), Ph.D. research scholars, M.Tech. students, and industry people, the fee for the STTP is ₹ 3000/- (no lodging and boarding, no TA/DA; only lunch, refreshments, and course material during STTP).  

About department

Our department began with an intake of 30 in 1981, and has grown to intake of 120 in B.Tech. (Electronics and Telecommunication Engineering) and two PG courses: M.Tech. (Electronics) with intake of 30 and M.Tech. (Embedded Systems and VLSI) with intake of 18 (started in 2015). The curriculum of M.Tech.(ES&VLSI) was designed under the supervision of Industry stalwarts. Adjuct faculty positions are given to Industry experts from Intel, Applied Micro, Samsung, Seagate, etc., for a few  courses in the programme, so that students get first hand industry perspective while learning. Students work on industry-level design suites such as Mentor, Cadence, Xilinx, etc.  Mentor (a Siemens business now) was instrumental in setting up a “Center for VLSI Design and Verification” in the department – which is a state-of-the-art VLSI laboratory. The UG course of the department is NBA accredited up to June 2020 and PG accreditation is in process.

Placements and internships are sought from leaders in Industry such as Intel, TCS, Seagate, SoCtronics, Synaptics, etc. So far, internships were offered from Intel (Bengaluru), Synaptics (Hyderabad), SoCtronics (Hyderabad), Applied Micro Circuits (Pune), Sankalp Semiconductors (Hubli), Tata Consultancy Services (Pune), Bit Mapper (Pune), CSIR-CEERI (Pilani), Rambus Chip Technologies (Bengaluru), and SAI Technology (Chennai).

About Institute

Autonomous Institute • Established by Govt. of Maharashtra • 641 UG + 199 PG admissions/pa • Strong Alumni network • 24x7 open advanced labs • “Center for VLSI Design and Verification” supported by Mentor • “Center of Excellence in Signal and Image Processing” under TEQIP-II • Center for Energy Storage and Harvesting (for research on solar cell and battery) • Dedicated faculty • Sports/gym • Open Electives • MoUs with national and International organisations • Ph.D. scholarships • Research culture • Patent Cell • Innovation Lab • Pragmatic BoM • Incubation + Startups on campus (Technology Innovation and Entrepreneurship Centre) • AICTE + DST + BRNS + TEQIP + Visveswaraiya + Rajeev Gandhi Funds • Credit Transfer Scheme • Visit www.sggs.ac.in for more

Committee

Prof. L.M. Waghmare, Director • Dr. A.B. Gonde, Head • Prof. Y.V. Joshi • Prof. S.N. Talbar • Prof. R.R. Manthalkar • Dr. S. S. Gajre

Contact

ssgajre@sggs.ac.in  +91-9421851011